22 lines
296 B
Makefile
22 lines
296 B
Makefile
BINARY=gearlib
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CC=gcc
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CFLAGS=-O3 -Iinclude -g
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LDFLAGS=-lglfw -lm
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CFILES=$(shell find -L src -type f -name '*.c')
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OBJ=$(CFILES:.c=.o)
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$(BINARY): $(OBJ) Makefile
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$(CC) $(OBJ) $(LDFLAGS) -o $@
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%.o: %.c
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$(CC) $(CFLAGS) -c $< -o $@
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run: $(BINARY)
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./$(BINARY)
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clean:
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rm -rf $(OBJ) $(BINARY)
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