early-access version 3718
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5 changed files with 42 additions and 15 deletions
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yuzu emulator early access
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=============
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This is the source code for early-access 3715.
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This is the source code for early-access 3718.
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## Legal Notice
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@ -93,6 +93,7 @@ void AppendCPUInfo(FieldCollection& fc) {
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add_field("CPU_Extension_x64_GFNI", caps.gfni);
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add_field("CPU_Extension_x64_INVARIANT_TSC", caps.invariant_tsc);
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add_field("CPU_Extension_x64_LZCNT", caps.lzcnt);
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add_field("CPU_Extension_x64_MONITORX", caps.monitorx);
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add_field("CPU_Extension_x64_MOVBE", caps.movbe);
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add_field("CPU_Extension_x64_PCLMULQDQ", caps.pclmulqdq);
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add_field("CPU_Extension_x64_POPCNT", caps.popcnt);
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@ -168,6 +168,7 @@ static CPUCaps Detect() {
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__cpuid(cpu_id, 0x80000001);
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caps.lzcnt = Common::Bit<5>(cpu_id[2]);
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caps.fma4 = Common::Bit<16>(cpu_id[2]);
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caps.monitorx = Common::Bit<29>(cpu_id[2]);
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}
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if (max_ex_fn >= 0x80000007) {
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@ -63,6 +63,7 @@ struct CPUCaps {
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bool gfni : 1;
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bool invariant_tsc : 1;
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bool lzcnt : 1;
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bool monitorx : 1;
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bool movbe : 1;
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bool pclmulqdq : 1;
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bool popcnt : 1;
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@ -13,36 +13,60 @@
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namespace Common::X64 {
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#ifdef _MSC_VER
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__forceinline static void TPAUSE() {
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namespace {
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// 100,000 cycles is a reasonable amount of time to wait to save on CPU resources.
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// For reference:
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// At 1 GHz, 100K cycles is 100us
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// At 2 GHz, 100K cycles is 50us
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// At 4 GHz, 100K cycles is 25us
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static constexpr auto PauseCycles = 100'000;
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_tpause(0, FencedRDTSC() + PauseCycles);
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constexpr auto PauseCycles = 100'000U;
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} // Anonymous namespace
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#ifdef _MSC_VER
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__forceinline static void TPAUSE() {
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static constexpr auto RequestC02State = 0U;
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_tpause(RequestC02State, FencedRDTSC() + PauseCycles);
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}
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__forceinline static void MWAITX() {
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static constexpr auto EnableWaitTimeFlag = 1U << 1;
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static constexpr auto RequestC1State = 0U;
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// monitor_var should be aligned to a cache line.
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alignas(64) u64 monitor_var{};
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_mm_monitorx(&monitor_var, 0, 0);
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_mm_mwaitx(EnableWaitTimeFlag, RequestC1State, PauseCycles);
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}
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#else
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static void TPAUSE() {
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// 100,000 cycles is a reasonable amount of time to wait to save on CPU resources.
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// For reference:
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// At 1 GHz, 100K cycles is 100us
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// At 2 GHz, 100K cycles is 50us
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// At 4 GHz, 100K cycles is 25us
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static constexpr auto PauseCycles = 100'000;
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static constexpr auto RequestC02State = 0U;
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const auto tsc = FencedRDTSC() + PauseCycles;
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const auto eax = static_cast<u32>(tsc & 0xFFFFFFFF);
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const auto edx = static_cast<u32>(tsc >> 32);
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asm volatile("tpause %0" : : "r"(0), "d"(edx), "a"(eax));
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asm volatile("tpause %0" : : "r"(RequestC02State), "d"(edx), "a"(eax));
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}
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static void MWAITX() {
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static constexpr auto EnableWaitTimeFlag = 1U << 1;
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static constexpr auto RequestC1State = 0U;
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// monitor_var should be aligned to a cache line.
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alignas(64) u64 monitor_var{};
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asm volatile("monitorx" : : "a"(&monitor_var), "c"(0), "d"(0));
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asm volatile("mwaitx" : : "a"(RequestC1State), "b"(PauseCycles), "c"(EnableWaitTimeFlag));
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}
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#endif
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void MicroSleep() {
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static const bool has_waitpkg = GetCPUCaps().waitpkg;
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static const bool has_monitorx = GetCPUCaps().monitorx;
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if (has_waitpkg) {
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TPAUSE();
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} else if (has_monitorx) {
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MWAITX();
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} else {
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std::this_thread::yield();
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}
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